Central Electronics Limited (CEL) has released the comprehensive recruitment notification for various regular and contractual executive and non-executive positions for the year 2026. Candidates aspiring to join this prestigious Mini Ratna Public Sector Enterprise under the Department of Scientific & Industrial Research must thoroughly understand the selection process and syllabus to secure a position. The Central Electronics Limited Result for various stages, including the written examination and personal interview, will be declared on the official website following the completion of each phase. The recruitment covers a wide range of roles such as Deputy General Manager, Senior Manager, Deputy Engineer, Personnel Officer, Graduate Engineer Trainee (GET) in Metallurgy, Electronics, Mechanical, and Computer Science, as well as Management Trainee (MT) in Finance and HR. For non-executive cadres, positions like Operator ‘A’ and Clerk ‘C’ are also included. The Selection Process primarily revolves around a Written Examination, which is a critical hurdle for all aspirants. Once the exam is conducted, the Central Electronics Limited Merit List will be prepared based on the performance of the candidates, adhering to the weightage criteria specified for different grades. For instance, for GET and MT positions, the written test carries 85% weightage while the interview carries 15%. For Deputy Engineer and Personnel Officer roles, the weightage is split 70% for the written test and 30% for the interview. Candidates must keep a close watch on the Official Website for updates regarding the download of the Result and the subsequent Document Verification schedule. The Cut Off Marks will be determined by the organization based on the difficulty level of the paper and the number of vacancies available in each category. It is essential for candidates to score the minimum qualifying marks in the written examination, which is 50% for general candidates and 40% for reserved categories (with variations based on post level), to be eligible for the Personal Interview or Trade Test. After the written test, the next stage involves an intensive Document Verification process where all original certificates, including educational qualifications, experience letters, and category certificates, will be scrutinized. Candidates successfully clearing all stages will find their names in the Final Selection List. To prepare effectively, aspirants should download the Syllabus PDF and focus on the two-part examination structure. Part I focuses on Domain Knowledge related to the specific engineering or management discipline, while Part II tests General Aptitude, including English, Reasoning, and Quantitative Aptitude. High performance in both sections is mandatory to surpass the competitive Cut Off Marks and advance to the next stage of the selection cycle. As CEL aims to expand its market presence in Solar Photovoltaics, Railway Signaling, and Strategic Electronics, they are looking for highly skilled individuals who can contribute to the company's growth. Detailed information regarding the marking scheme, which includes a negative marking of one-fourth for every wrong answer, must be kept in mind during preparation. Candidates are advised to regularly visit the career section of the CEL website to stay updated on the release of the scorecard and the schedule for the final merit list publication.
Location
Multiple Locations
Total Vacancy
37 Posts
Advertisement No
118/Pers/1/2026
Central Electronics Limited Various Posts Syllabus
(CEL) Central Electronics Limited
Important Dates
| Event | Dates |
|---|---|
| Last Date | 03 Mar, 2026 |
| Admit Card Release Date | Will Be Notified |
| Exam Date | Will Be Notified |
| Result Declaration | Will Be Notified |
Exam Details
| Exam Stages | Exam Details |
|---|---|
| Stage 1 | Written Examination |
| Stage 2 | Document Verification |
| Stage 3 | Personal Interview / Trade Test |
| Selection Process |
| Selection Process: The recruitment includes multiple evaluation stages for candidate assessment. |
| Exam Mode: The initial stage consists of a computer-based or paper-based written examination. |
| Final Stage: Candidates who qualify the written test will proceed to interview or trade tests for final evaluation. |
Written Examination
| Part I - Domain Knowledge | Subject matter related to specific post (Electronics, Mechanical, CS, Finance, HR, Metallurgy etc.) |
Important Instructions for Job Seekers
- Never pay any money, fee, or donation for a job.
- Verify details only from the official website/notification.
- Do not trust job offers received via random emails, messages, or calls.
- Never share bank details, OTP, or passwords with anyone.
- If in doubt, contact the official recruiting authority directly.
How To Download Central Electronics Limited Syllabus PDF
Important Links
Exam Preparation Tips
Frequently Asked Questions
The Central Electronics Limited syllabus for GET and MT consists of two parts: Part I focuses on Domain Knowledge (60 questions) related to the specific engineering or management stream, and Part II covers General Aptitude (40 questions).
Yes, the Central Electronics Limited exam pattern includes negative marking. For every incorrect or multiple answer, 1/4 (0.25) marks will be deducted from the total score of the candidate.
The Central Electronics Limited aptitude test (Part II) comprises questions from General English, Reasoning, Quantitative Aptitude, and General Awareness, designed to test the candidate's basic mental ability.
The Central Electronics Limited written examination, whether conducted as a Computer-Based Test or a Paper-Based Test, has a total duration of 2 hours (120 minutes) for all candidates.
For the post of Deputy Engineer in Central Electronics Limited, the final merit list is decided based on a 70% weightage for the written examination marks and 30% weightage for the personal interview performance.
The Central Electronics Limited written test consists of 100 objective-type multiple-choice questions in total, with 60 questions in the Domain Knowledge section and 40 in the Aptitude section.